Primarily because it saves pins while giving up almost nothing for typical debugging. SWD needs only two pins (SWDIO and SWCLK) versus JTAG's four to five, and on the small packages common for Cortex-M microcontrollers every pin is valuable, those freed pins become available GPIO or peripheral functions for the application, which can be the difference between fitting a design in a smaller, cheaper package or not. SWD provides the same essential debug operations as JTAG for a single Cortex-M core, halt/run/step/reset, full register and memory access, hardware breakpoints and watchpoints, flash programming, so you don't lose debug capability by choosing it. What you give up is mainly JTAG's boundary-scan (board-level test) and easy multi-device daisy-chaining, which most single-MCU designs don't need. ARM designed SWD specifically for this, and made it shareable with JTAG on the same physical pins (SWJ-DP) so a part can support both. Add a third pin, SWO, and you also get single-wire trace output (ITM) for non-halting printf/profiling. So for the overwhelmingly common case, debugging one Cortex-M and wanting maximum usable pins, SWD is the obvious choice, and that's why it's the default on ARM.
Debugging & Toolchain · Interview question
Why does SWD dominate on ARM Cortex-M devices?
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On-Chip Debugging: JTAG & SWD
How GDB physically reaches into a running chip: built-in debug logic accessed via JTAG (4-5 pins) or ARM's 2-pin SWD, through a debug probe, enabling halt/run, memory access, flashing, and trace.