They're both interfaces to a chip's on-chip debug logic, but they differ in pin count and origin. JTAG is the older, general-purpose standard using four or five pins, TCK (clock), TMS (mode select), TDI (data in), TDO (data out), and an optional TRST (reset), and it was originally designed for boundary-scan board testing (shifting patterns through chips to verify solder connections) before being adopted for CPU debug; it can also daisy-chain multiple devices on one bus. SWD (Serial Wire Debug) is ARM's two-pin alternative, SWDIO (bidirectional data) and SWCLK (clock), that provides the same core debug capabilities (halt/run, memory and register access, breakpoints, flashing) for Cortex-M with far fewer pins. Because pins are scarce on small MCUs, SWD dominates ARM Cortex-M designs, freeing the other JTAG pins for application use. On many ARM parts the same physical pins implement a switchable port (SWJ-DP) that can operate as either JTAG or SWD. So the practical summary: JTAG is the older multi-pin, multi-device, boundary-scan-capable standard; SWD is the ARM-specific, two-pin, debug-focused interface that's the default choice when you only need to debug a single Cortex-M and want to save pins. SWD lacks JTAG's boundary-scan, which is the main capability you give up.
Debugging & Toolchain · Interview question
What's the difference between JTAG and SWD?
A strong answer
What a weak answer sounds like
You know the answer. Do you know what gets you dinged?
Pro breaks down the answer most candidates actually give to this question — and the specific reason an interviewer marks it down. It’s the difference between sounding correct and sounding senior, on all 472 questions.
From the lesson
On-Chip Debugging: JTAG & SWD
How GDB physically reaches into a running chip: built-in debug logic accessed via JTAG (4-5 pins) or ARM's 2-pin SWD, through a debug probe, enabling halt/run, memory access, flashing, and trace.