Many status-register flags are cleared by writing a 1 to that bit position (write-1-to-clear, sometimes called w1c or rc_w1), not by writing a 0, writing 0 typically has no effect. This is hardware-friendly because it lets you clear a specific flag without a read-modify-write. The trap is doing a read-modify-write on such a register: if you read the status register, clear one bit in your local copy, and write the whole thing back, every other bit that was a 1 (another pending flag) gets written back as a 1, which clears those flags too, silently acknowledging interrupts or events you never handled. The correct pattern is to write a value with a 1 only in the bit you intend to clear and 0s elsewhere (so the 0s are no-ops on the other flags). So status registers must be handled per their datasheet semantics, not treated like normal RAM where RMW is safe, confusing the two is a real source of "lost interrupt" bugs.
Embedded Systems Fundamentals · Interview question
What is a write-1-to-clear flag and why is it a trap?
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From the lesson
Registers & Memory-Mapped I/O
How writing a memory address turns on an LED: control/status/data registers, the volatile register-overlay struct, and the write-1-to-clear and atomic set/reset traps.