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Registers & Memory-Mapped I/O

How writing a memory address turns on an LED: control/status/data registers, the volatile register-overlay struct, and the write-1-to-clear and atomic set/reset traps.

22 min read

In this lesson:

what a hardware register is and the three kinds (control, status, data)
memory-mapped I/O: base address + offset, and the register-overlay struct
why volatile is mandatory and why width/alignment matter
atomic set/reset registers (BSRR) vs read-modify-write
write-1-to-clear flags and other "registers aren't normal memory" traps

This is the hardware view of the pointer/volatile/struct-overlay ideas from the C module.

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5 interview questions on this topic

Each one opens a full worked answer.

How does writing to a C variable end up controlling hardware?Why is volatile required for register access?What's the advantage of a bit set/reset register (like BSRR) over read-modify-write on the output register?What is a write-1-to-clear flag and why is it a trap?Why might reading a register "just to check it" be a bug?

This is just the start

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Registers & Memory-Mapped I/O | EmbeddedPrep.io