Embedded Systems Fundamentals · Interview question

How is PWM generated using a timer?

A strong answer

PWM is a timer running in output-compare mode, not software pin-toggling. The timer counter ramps from 0 up to the auto-reload value ARR and repeats, which sets the PWM period (and thus frequency: f = f_clk/((PSC+1)(ARR+1))). A compare register CCR sets the switching point: the output is high while the counter is below CCR and low at or above it (PWM mode 1), so the duty cycle is CCR/(ARR+1). Once configured, the hardware regenerates the waveform every period autonomously, to change brightness or motor speed you just write a new CCR value, with zero CPU involvement and no jitter. This is exactly why PWM is done in hardware: software toggling would consume the CPU and produce timing jitter, whereas the timer gives glitch-free, precise edges. ARR sets frequency, CCR sets duty, that's the whole mental model.

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From the lesson

PWM

Fake an analog level with a digital pin: a fixed-frequency square wave whose duty cycle sets the average voltage, built on a timer and used for LEDs, motors, and servos.

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How is PWM generated using a timer? | EmbeddedPrep.io