It means peripheral control and status registers occupy addresses in the same flat address space as RAM and flash, so the CPU accesses them with ordinary load and store instructions, there's no separate "I/O instruction" like on some older architectures (that's port-mapped I/O). Reading address 0x2000_0000 might hit SRAM; reading 0x4002_0010 might read a GPIO input register; writing 0x4002_0014 might drive output pins. To the CPU it's all just memory accesses, which is precisely why a C pointer cast to the right address can read and write hardware (*(volatile uint32_t*)0x40020014). The consequences: you must mark those accesses volatile (hardware changes the values and writes have side effects, so the compiler mustn't cache or elide them), and access width/alignment must match what the peripheral expects. Memory-mapped I/O is what makes register programming in C possible and is the foundation of every driver.
Embedded Systems Fundamentals · Interview question
What does it mean that peripheral registers are "memory-mapped"?
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From the lesson
Inside an MCU
The block diagram demystified: a CPU core, flash and SRAM, and peripherals wired together by internal buses, and why peripherals working in parallel with the CPU is the whole point.