From low to high addresses: at 0x0000_0000 there's a boot alias that the BOOT pins map to flash, system ROM, or SRAM, it's what the core reads at reset. Flash sits at its vendor base (0x0800_0000 on STM32) and holds program code, const data, and the initial vector table. SRAM is at 0x2000_0000 and holds .data, .bss, the heap, and the stack. The peripheral region begins at 0x4000_0000 and contains all the memory-mapped registers, GPIO, timers, UART, ADC, etc., grouped by bus (APB/AHB). And at 0xE000_0000 is the Private Peripheral Bus, the core's own system region containing the NVIC, SysTick, and System Control Block. The broad bands are ARM-standard so code is portable across Cortex-M vendors; the exact flash/SRAM sizes and bases are device-specific and come from the reference manual.
Embedded Systems Fundamentals · Interview question
Walk through the regions of a typical Cortex-M memory map.
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From the lesson
The Memory Map
Why code lives at 0x08000000 and variables at 0x20000000: the Cortex-M address layout of flash, SRAM, and peripherals, and how stack and heap share the SRAM with no MMU to referee.