Communication Protocols · Interview question

Parallel sends 8 bits at once and serial sends 1, so why are fast modern buses serial?

A strong answer

Because at high speed and any real distance, parallel's apparent advantage collapses. The 8 (or more) parallel lines don't all arrive at exactly the same instant, propagation differences cause skew, and as the clock rate climbs, that timing spread between lines becomes a larger fraction of the bit period until you can no longer reliably latch all bits on one edge. Many fast-switching parallel lines also create crosstalk and EMI, and they cost pins, board area, and connector size. A single well-controlled serial line has none of the inter-line skew problem, so it can be clocked far faster, and techniques like differential signaling and embedded clocks push it further. The net result is that one fast serial lane beats a wide skewed parallel bus, which is exactly why USB replaced parallel ports, SATA replaced PATA, and PCIe replaced PCI. Parallel now survives mainly on-chip and very short, like memory buses. So "more wires" doesn't mean "more throughput" once speed and distance enter.

What a weak answer sounds like

You know the answer. Do you know what gets you dinged?

Pro breaks down the answer most candidates actually give to this question — and the specific reason an interviewer marks it down. It’s the difference between sounding correct and sounding senior, on all 472 questions.

From the lesson

Serial vs Parallel, Sync vs Async

The two axes that classify every bus: serial vs parallel (one wire or many) and synchronous vs asynchronous (shared clock or agreed-upon rate), and where UART, SPI, I2C, and CAN land.

More Serial vs Parallel, Sync vs Async questions

Browse all 472 interview questions
Parallel sends 8 bits at once and serial sends 1, so why are fast modern buses serial? | EmbeddedPrep.io