It declares a struct whose members mirror the peripheral's register block in order, each volatile uint32_t corresponding to one register at its datasheet offset, then casts the peripheral's base address to a pointer to that struct. For example #define GPIOA ((GPIO_TypeDef *)0x48000000u), after which GPIOA->ODR = 1; writes the output-data register by name. Three things make this work: the members are all 4-byte and 4-byte-aligned so the compiler inserts no padding and the member offsets exactly equal the hardware register offsets; volatile ensures every access actually hits the bus and isn't cached or optimized away; and where the address map has gaps, the header inserts explicit RESERVED[n] filler arrays to keep subsequent offsets correct. This is the CMSIS pattern used across ARM Cortex-M vendor headers.
C Programming · Interview question
How does a vendor header map a C struct onto hardware registers?
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Structs, Unions & Bitfields
Group related data, overlay the same bytes two ways, and pack flags into bits, plus the padding and alignment rules that decide sizeof and bite packet parsing.